Author ORCID Identifier
https://orcid.org/0009-0007-4980-9715
Date of Award
Spring 6-3-2026
Document Type
Thesis (Undergraduate)
Department
Computer Science
First Advisor
Sergey Bratus
Abstract
The rising adoption of ZK (Zero-Knowledge) technology has led to a plethora of DSLs (Domain Specific Languages) for facilitating the development of ZK circuits. At the same time, there has also been an increase in the number of compilation targets for these languages, with different cryptographic foundations and performance optimizations. LLZK, by Veridise, aims to unify the ecosystem by providing a single IR (Intermediate Representation) for the different frontend DSLs, that would then also allow choosing between different backends. Given the high stakes (particularly financial) that a lot of ZK circuits are under, together with their high level of complexity, we believe that the LLZK language is a prime target for verification. In this paper, we present LLZK-SymEx, a symbolic execution engine for LLZK, as well as a formal model for the execution and verification of LLZK code. We show that unlike traditional symbolic execution, because ZK programs are eventually compiled to arithmetic circuits, the challenge of path explosion is reduced, allowing for efficient analysis. We show that LLZK-SymEx can scale to verify real circuits by testing it against circuits of sizeable complexity, and that our formal model is versatile enough to express both function contracts and properties such as under-constrainedness.
Recommended Citation
Schaievitch, Nicolás Iair, "LLZK-SymEx: Building a Circuit Verification Framework for the LLZK Zero-Knowledge Intermediate Language" (2026). Computer Science Senior Theses. 56.
https://digitalcommons.dartmouth.edu/cs_senior_theses/56
