Document Type
Technical Report
Publication Date
1-1-1986
Technical Report Number
PCS-TR86-105
Abstract
A new design of a memory device which allows simultaneous access to more than one location is proposed. The unique feature of this multiple accessibility of the memory is realized by applying a binomial concentrator, a type of sparse crossbar interconnection network, to content-addressable memory. The organization of the memory system and the concentration network structure as well as the network characteristics are described along with a distributive control algorithm. Applications of the memory system to parallel processing environments are also included.
Dartmouth Digital Commons Citation
Nakamura, Shinji, "Parallel Accessible Memory" (1986). Computer Science Technical Report PCS-TR86-105. https://digitalcommons.dartmouth.edu/cs_tr/6
