Document Type
Technical Report
Publication Date
12-1993
Technical Report Number
PCS-TR93-202
Abstract
In this paper we present a method to obtain optimal h-v and inclusion drawings in parallel. Based on parallel tree contraction, our method computes optimal (with respect to a class of cost functions of the enclosing rectangle) drawings in $O(\log^2 n)$ parallel time by using a polynomial number of EREW processors. The number of processors reduces substantially when we study minimum area drawings. The method can be extended to compute optimal inclusion layouts in the case where each leaf $l$ of the tree is represented by rectangle $l_x \times l_y$ (the dimensions of which are part of the input). For polynomial area layouts, our work places the problem of obtaining optimal size h-v or inclusion drawings in NC, presenting the first algorithm with polylogarithmic time complexity. Our method also yields an NC algorithm for the slicing floorplanning problem. Whether this problems was in NC was an open question~\cite{CT90}.
Dartmouth Digital Commons Citation
Metaxas, Panagiotis T.; Pantziou, Grammati E.; and Symvonis, Antonis, "Parallel h-v Drawings of Binary Trees" (1993). Computer Science Technical Report PCS-TR93-202. https://digitalcommons.dartmouth.edu/cs_tr/73
