Date of Award
Department or Program
Kofi M. Odame
Electrical Impedance Tomography (EIT) is a medical imaging methodology that does not need any kind of ionizing radiation. It is significantly cheaper and smaller than Computerized Tomography (CT) or Magnetic Resonance Imaging (MRI). These advantages make EIT particularly suitable for emerging applications like the continuous medical imaging and telemonitoring of organ function. Current bench-top EIT systems are bulky and require shielded cables to interface with measurement electrodes. The cable introduces parasitic capacitances which shunt the desired signals and degrade the accuracy of the measurements. A EIT system based on application-specific integrated circuits (ASICs) can reduce the parasitic and stray capacitance within the measurement circuits, thus improving the system bandwidth and the measured signal quality. This thesis presents the design of integrated circuit instrumentation amplifiers and techniques that are suitable for broadband ASIC-based EIT systems. The basic specifications and the amplifier design challenges are reviewed and addressed. It shows that the instrumentation amplifier must amplify the voltage difference between a pair of electrodes while rejecting the large common-mode interference that appears within the bandwidth of interest. Moreover, it must process a wide dynamic range of input signals without sacrificing the temporal resolution (frame rate) of the imaging system. The thesis introduces novel circuit designs and techniques that are essential for achieving the desired amplifier performance. The proposed work also includes the theoretical analyses of the novel approaches and measurement results of the prototype CMOS integrated circuit instrumentation amplifiers.
Teng, Yueh-Ching, "THE DESIGN OF CMOS FRONT-END AMPLIFIERS FOR ELECTRICAL IMPEDANCE APPLICATIONS" (2022). Dartmouth College Ph.D Dissertations. 95.
Available for download on Friday, July 05, 2024